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mini-Spectrometer SMD series: C14384MA-01

E-mail contact

+886-2-8772-8910

FEATURES
Ultra-compact: 11.7 × 4.0 × 3.1 mm*1
Ultra-lightweight: 0.3 g
Spectral response range: 640 to 1050 nm
High sensitivity: 50 times (λ=1000 nm) the previous product (C11708MA)
Flexible cable included
 
 
APPLICATIONS
Food inspection (sugar content, moisture, fat)
Light level measurement
Component analysis
Absorption spectrum measurement of apple

 

Absorption spectrum measurement of bacon

 

STRUCTURE

Parameter

Specification

Unit

Image sensor

High-sensitivity CMOS linear image sensor with a slit

-

Number of pixels

256 (including optical black)*2

Pixels

Pixel size (H × V)

“7 to 14.4”*3  × 200

μm

Slit*4 (H × V)

15 × 300

μm

NA*5

0.22

-

Dimensions (W × D × H)*1

11.7 × 4.0 × 3.1

mm

Weight

0.3

g

*1: Flexible cable not included
*2: Number of effective pixels=192 (pixel no. 65 to 256)
*3: Varies depending on the pixel
*4: Light-incident aperture size
*5: Numeric aperture (solid angle)
 
Absolute maximum ratings (Ta=25 °C unless otherwise noted)

Parameter

Symbol

Condition

Values

Unit

Supply voltage

Vs max

 

-0.3 to +6

V

Clock pulse voltage

V(CLK)

 

-0.3 to +6

V

Start pulse voltage

V(ST)

 

-0.3 to +6

V

Operating temperature

Topr

No dew condensation*6

+5 to +50

°C

Storage temperature

Tstg

No dew condensation*6

-20 to +70

°C

*6: When there is a temperature difference between a product and the surrounding area in high humidity environment, dew condensation may occur on the product surface. Dew condensation on the product may cause deterioration in characteristics and reliability.
Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the product within the absolute maximum ratings.
 
 
 
 
Recommended terminal voltage (Ta=25 °C)

Parameter

Symbol

Min.

Typ.

Max

Unit

Supply voltage

Vs

4.75

5

5.25

V

Clock pulse voltage

High level

V(CLK)

Vs - 0.25

Vs

Vs + 0.25

V

Low level

0

-

0.3

Start pulse voltage

High level

V(ST)

Vs - 0.25

Vs

Vs + 0.25

V

Low level

0

-

0.3

 
 
Electrical characteristics [Ta=25 °C, Vs=5 V, V(CLK)=V(ST)=5 V]

Parameter

Symbol

Min.

Typ.

Max

Unit

Clock pulse frequency

f(CLK)

0.2

-

5

MHz

Video rate

VR

-

f(CLK)

-

Hz

Output impedance*7

Zo

-

150

-

Ω

Current consumption*8

I

-

20

-

mA

*7: Video signal output terminal (5-pin)
An increase in the current consumed at the video terminal causes the chip temperature to increase, which also increases the dark current. Therefore, connect a buffer amplifier to the video output terminal, and keep the current from flowing as much as possible.
*8: f(CLK)=5 MHz
 
 
 
 
Electrical and optical characteristics [Ta=25 °C, Vs=5 V, V(CLK)=V(ST)=5 V]

Parameter

Symbol

Min.

Typ.

Max

Unit

Conversion efficiency

CE

-

50

-

μV/e-

Dark output voltage*9

Vd

-

0.4

4

mV

Saturation output voltage*10

Vsat

3.6

4.3

4.7

V

Readout noise

Nr

0.2

0.8

2.4

mV rms

Output offset voltage

Vo

0.3

0.5

0.9

V

Spectral response range

λ

-

640 to 1050

-

nm

Spectral resolution (FWHM)

640 to 800 nm

-

-

20

25

nm

800 to 1050 nm

-

17

20

Wavelength reproducibility*11

λr

-0.5

-

0.5

nm

Wavelength temperature dependence

λTd

-0.1

-

0.1

nm/°C

Spectral stray light*12

SL

-

-

-23

dB

*9: Integration time=10 ms
*10: Relative value with output offset voltage Vo as the reference
Example: When output offset voltage Vo is 0.5 V and saturation output voltage Vsat is 4.3 V, the saturation voltage at the video signal output terminal is 4.8 V.
*11: Measured under constant light input conditions
*12: The ratio of the count measured when a line spectrum (850 nm) is input to the count measured when an 850 ± 40 nm light is input
 
Structure
MS Series   Micro Series   SMD Series
   
The glass used does not expand easily with rising temperatures, so  the temperature dependency of the wavelength is extremely small.   The metal package provides high humidity resistance. Low cost is achieved because it is a hollow type.   Being ultra-compact, it can be integrated into mobile devices and drones. 
 
Spectral response (typical example)
 
Spectral resolution vs. wavelength (typical example)
 
 
Spectral stray light characteristics (typical example)
 
Recommended driver circuit example
 
 
Dimensional outline (unit: mm)
 
 
Pin connections

Pin no.

Symbol

Name

I/O

Description

1

Vlcp

Bias voltage for negative voltage circuit*13

I

 

2

CLK

Clock pulse

I

Sensor clock pulse

3

TRG

Trigger pulse

O

Pulse for acquiring sensor video signals

4

ST

Start pulse

I

Sensor start pulse

5

Video

Video output

O

Sensor video output

6

GND

Ground

-

Sensor GND

7

EOS

End of scan

O

End of sensor scan

8

Vs

Supply voltage

I

Power supply for sensor: 5 V

*13: Approximately -1.5 V generated by the negative voltage circuit inside the image sensor is output to this pin. Because the voltage must be maintained, insert a capacitor around 1 μF between Vlcp and GND.
 
 
 
Timing chart
 

Parameter

Symbol

Min.

Typ.

Max.

Unit

Start pulse period*14

tpi(ST)

349/f(CLK)

-

-

s

High start pulse period*15

thp(ST)

6/f

-

-

s

Low start pulse period

tlp(ST)

343/f

-

-

s

Start pulse rise/fall times

tr(ST), tf(ST)

0

10

30

ns

Clock pulse duty

-

45

50

55

%

Clock pulse rise/fall times

tr(CLK), tf(CLK)

0

10

30

ns

*14: Shortest period necessary for outputting the video signal of all pixels
*15: The integration time corresponds to high ST period + 48 CLK cycles.
The shift register starts operating at the rising edge of the CLK immediately after ST becomes low. The integration time can be changed by changing the ratio of the high and low periods of ST.
If the first TRG after ST becomes low is considered to be the first signal, acquire the Video at the rising edge of the 153th TRG signal. If you want to acquire data including the optical black pixels, acquire the Video at the rising edge of the 89th TRG signal.
 
 
Operation example
Start pulse period [tpi(ST)] = Video data rate
= 5 MHz
Minimum low start pulse period [tlp(ST)] = 343/f(CLK)
= 343/5 MHz
= 68.6 μs
High start pulse period [thp(ST)] 
= Start pulse period [tpi(ST)] - Minimum low start pulse period [tlp(ST)]
= 69.8 μs - 68.6 μs
=1.2 μs

Because the integration time is equivalent to high start pulse period + the period of 48 clock pulses, we obtaine 1.2 μs + 9.6 μs = 10.8 μs.

 

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